The present invention concerns a method of synchronising data; in particular, but not exclusively, the invention relates to a method of synchronising received serial data in a communication system. Moreover, the invention also relates to a system operable to synchronise data according to the method.
Methods of synchronising serial data are well known. These methods generally involve steps of:                (i) receiving a serial data stream;        (ii) identifying one or more time distinguishing features in the stream;        (iii) comparing timing of the one or more time features with reference clock timing features; and        (iv) then frequency and phase shifting at least one of the serial data stream and the reference clock so that the stream time distinguishing features and the clock timing features are in a mutually constant phase relationship.        
Data synchronisation is especially important in communication systems employing time division multiplexing (TDM) techniques for conveying several input signals in a single composite signal; in TDM, the composite signal comprises repetitive frames, each frame partitioned in sequential time slots. Each input signal has associated therewith a corresponding time slot in the frames in which the signal is conveyed.
In a typical conventional TDM communication system, synchronous transfer of a serial data signal from one piece of system equipment to another often requires a common data clock signal to be available within the system. The data clock signal needs to have a time distinguishing feature to provide a synchronisation reference; for example, the data clock signal can comprise repetitive frame synchronisation pulses together with a regular clock signal. For such a system to function correctly, total serial data signal propagation delays within the system must be significantly less than a data bit period of data in the serial data signal, otherwise it is impossible to identify the start of frames within the serial data signal. Thus, in the typical conventional system having a given system synchronisation architecture, an increase in serial data rate will require a corresponding increase in data clock rate in the architecture. Such an increase in data clock rate is often not practicable in conventional communication systems whose synchronisation architecture is already established. The total serial data propagation delays, and corresponding propagation delays to clock data within the system, are a limiting factor governing physical separations of data transmitters and data receivers within the system; the inventors have appreciated that this limiting factor is a problem.